Modeling of Transistors in Small-Signal Condition

This article is about the modeling of MOSFET in small-signal condition.

Direct Extraction Conditions

Bias State	Condition
Zero bias	$V_{gs}=0,V_{ds}=0$
Strong inversion	$V_{gs}>V_{th},V_{ds}=0$
Active	$V_{ds}>V_{gs}-V_{th}>0$

Small-Signal Parameter Extraction

Model Description

Schematic of the small-signal MOSFET model. It is comprised of an intrinsic transistor and extrinsic parasitic resistors and inductors (not drawn). In the model, the non-quasi-static (NQS) effect is represented by a delay $\tau_g$ in the voltage-controlled current source (VCCS).

The Y parameter of the intrinsic transistor $Y'$ is

$$\begin{aligned} Y'_{11}&=\frac{\omega^2R_{gd}C_{gd}^2+j\omega C_{gd}}{1+\omega^2R_{gd}^2C_{gd}^2}+\frac{\omega^2R_{gs}C_{gs}^2+j\omega C_{gs}}{1+\omega^2R_{gs}^2C_{gs}^2}\\ Y'_{12}&=-\frac{\omega^2R_{gd}C_{gd}^2+j\omega C_{gd}}{1+\omega^2R_{gd}^2C_{gd}^2}\\ Y'_{21}&=-\frac{\omega^2R_{gd}C_{gd}^2+j\omega C_{gd}}{1+\omega^2R_{gd}^2C_{gd}^2}+\frac{g_me^{-j\omega\tau_g}(1-j\omega C_{gs})}{1+\omega^2R_{gs}^2C_{gs}^2}\\ Y'_{22}&=\frac{\omega^2R_{gd}C_{gd}^2+j\omega C_{gd}}{1+\omega^2R_{gd}^2C_{gd}^2}+\frac{\omega^2R_{db}C_{db}^2+j\omega C_{db}}{1+\omega^2R_{db}^2C_{db}^2}+\frac{1}{R_{ds}}+j\omega C_{ds} \end{aligned}$$

Several observations can be made from the Y parameter. First, the denominator of these equations approaches unit when the frequency approaches zero. For instance, at sufficiently low frequency, we have

$$Y'_{22}+Y'_{12}=\frac{1}{R_{ds}}+\omega^2R_{db}C_{db}^2+j\omega(C_{ds}+C_{db})$$

Second, at sufficiently high frequency, the Y parameter can be simplified as

$$Y'_{22}+Y'_{12}=\frac{1}{R_{ds}}+\frac{1}{R_{db}}+j\omega C_{ds}$$

Adopting these two conditions, we may calculate $R_{ds}, R_{db}, C_{ds}, C_{db}$.

The Z parameter of the whole transistor $Z$ is

$$\begin{aligned} Z_{11}&=Z'_{11}+R_g+R_s+j\omega(L_s+L_g)\\ Z_{12}&=Z'_{12}+R_s+j\omega L_s\\ Z_{21}&=Z'_{21}+R_s+j\omega L_s\\ Z_{22}&=Z'_{22}+R_d+R_s+j\omega(L_s+L_d) \end{aligned}$$

where $Z'$ is the Z parameter of the intrinsic transistor, and can be converted from the aforementioned Y parameter.

To extract the outside parasitic parameters, coldFET method is used. In the setting, the transistor is biased in strong inversion region (high Vgs and zero Vds). Hence, the drain and the source of the intrinsic transistor is assumed to be connected together. The Z parameter for this setting is

$$\begin{aligned} Z_{11}=&R_s+R_g+j\omega(L_s+L_g)+\\ &\frac{(1+j\omega C_{gd}R_{gd})(1+j\omega C_{gs}R_{gs})}{j\omega(C_{gd}+C_{gs})-j\omega C_{gd}C_{gs}(R_{gd}+R_{gs})}\\ Z_{12}=&Z_{21}=R_s+j\omega L_s\\ Z_{22}=&R_s+R_d+j\omega(L_s+L_d) \end{aligned}$$

We may further split the real and imaginary part of the $Z_{11}$, as

$$\begin{aligned} \mathrm{real}(Z_{11})&=R_s+R_g+\frac{A_1+B_1\omega^2}{C+D\omega^2}\\ \mathrm{imag}(Z_{11})&=\omega(L_s+L_g)+\frac{1}{\omega}\frac{A_2+B_2\omega^2}{C+D\omega^2}\\ A_1&=C_{gs}^2R_{gs}+C_{gd}^2R_{gd}\\ B_1&=C_{gs}^2C_{gd}^2R_{gs}R_{gd}(R_{gs}+R_{gd})\\ A_2&=C_{gs}+C_{gd}\\ B_2&=C_{gs}C_{gd}(C_{gs}R_{gs}^2+C_{gd}R_{gd}^2)\\ C&=(C_{gs}+C_{gd})^2\\ D&=C_{gs}^2C_{gd}^2(R_{gs}+R_{gd})^2 \end{aligned}$$

After manipulation, $L_g, R_g$ can be obtained from

$$\begin{aligned} \frac{\partial\ \mathrm{real}(Z_{11})\omega^2}{\partial\ \omega^2} &=R_s+R_g+\frac{A_1C+\omega^2B_1(2C+\omega^2D)}{(C+D\omega^2)^2}\\ \frac{\partial\ \mathrm{imag}(Z_{11})\omega}{\partial\ \omega^2} &=L_s+L_g+\frac{B_2 C- A_2D}{(C+D\omega^2)^2} \end{aligned}$$

Extraction

In the first step, we have to extract the extrinsic parameters. Equations are detailed as follows. Unless otherwise stated, the extraction can be performed at any frequency. The transistor must be biased in strongly inversed region (i.e., high Vgs and zero Vds).

$$\begin{aligned} R_s&=\mathrm{real}(Z_{12})\\ L_s&=\frac{\mathrm{imag}(Z_{12})}{\omega}\\ R_d&=\mathrm{real}(Z_{22}-Z_{12})\\ L_d&=\frac{\mathrm{imag}(Z_{22}-Z_{12})}{\omega}\\ R_g&\approx \frac{\partial\ \mathrm{real}(Z_{11})\omega^2}{\partial\ \omega^2}\bigg|_{\omega\to\infty}-R_s\\ &\approx\frac{\mathrm{imag}(Z_{11}-Z_{12})}{\omega}\\ L_g&=\frac{\partial\ \mathrm{imag}(Z_{11})\omega}{\partial\ \omega^2}\bigg|_{\omega\to\infty}-L_s \end{aligned}$$

The second step is to de-embed the extrinsic parameters. For measured data, the extrinsic parameters can be subtracted from the Z parameter; for simulation, we can simply add negative resistors and inductors at proper positions to cancel the original extrinsic parasitics.

The third step is to assess the intrinsic parameters. For this measurement, the transistor has to be biased at nominal gate and drain voltage. Y parameter is measured at both very low and high frequencies. Equations are as follows.

At a sufficient low frequency

$$\begin{aligned} C_{gs}&=\frac{\mathrm{imag}(Y'_{11}+Y'_{12})}{\omega}\bigg|_{\omega\to0}\\ R_{gs}&=\frac{\mathrm{real}(Y'_{11}+Y'_{12})}{\omega^2C_{gs}^2}\bigg|_{\omega\to0}\\ C_{gd}&=\frac{\mathrm{imag}(-Y'_{12})}{\omega}\bigg|_{\omega\to0}\\ R_{gd}&=\frac{\mathrm{real}(-Y'_{12})}{\omega^2C_{gd}^2}\bigg|_{\omega\to0}\\ g_m&=\left|\frac{Y'_{21}-Y'_{12}}{Y'_{11}+Y'_{12}}\right|\mathrm{imag}(Y'_{11}+Y'_{12})\bigg|_{\omega\to0}\\ &\approx\mathrm{real}(Y'_{21})\bigg|_{\omega\to0}\\ \tau_g&=\mathrm{phase}\left|\frac{Y'_{21}-Y'_{12}}{Y'_{11}+Y'_{12}}\right|\frac{\mathrm{imag}(Y'_{11}+Y'_{12})}{\omega}\bigg|_{\omega\to0} \end{aligned}$$

Besides

$$\begin{aligned} C_{ds}&=\frac{\mathrm{imag}(Y'_{22}+Y'_{12})}{\omega}|_{\omega\to\infty}\\ C_{db}&=\frac{\mathrm{imag}(Y'_{22}+Y'_{12})}{\omega}-C_{ds}\bigg|_{\omega\to0}\\ R_{ds}&=\frac{1}{\mathrm{real}(Y'_{22}+Y'_{12})}\bigg|_{\omega\to0}\\ R_{db}&=\frac{1}{\mathrm{real}(Y'_{22}+Y'_{12})-1/R_{ds}}\bigg|_{\omega\to\infty}\\ \end{aligned}$$

Extraction Example

Extrinsic Parameter Extraction

Thus, estimated parameters are $R_s=0.39,R_d=0.36,R_g=0.51$, inductances are ignored.

De-Embedding

The de-embedding can be implemented simply by adding negative "resistors" and "inductors" to each terminal of the transistor.

Intrinsic Parameter Extraction

Verification

In the verification, the NQS effect is ignored.

Strange Things

1. Negative inductance at the each gate and drain
2. Rgd is negative

Reference

1. 丛诗力. 毫米波CMOS晶体管建模技术研究.
2. 李志群, 王志功. 射频集成电路与系统.
3. Yang Tang, Li Zhang, Yan Wang, "Accurate small signal modeling and extraction of silicon MOSFET for RF IC application," Solid-State Electronics.